APA (7th ed.) Citation

Trimeche, A., Sakly, A., & Mtibaa, A. (2015). FPGA Implementation of ML, ZF and MMSE Equalizers for MIMO Systems. Procedia computer science, 73, 226-233. https://doi.org/10.1016/j.procs.2015.12.022

Chicago Style (17th ed.) Citation

Trimeche, Abdessalem, Anis Sakly, and Abdellatif Mtibaa. "FPGA Implementation of ML, ZF and MMSE Equalizers for MIMO Systems." Procedia Computer Science 73 (2015): 226-233. https://doi.org/10.1016/j.procs.2015.12.022.

MLA (9th ed.) Citation

Trimeche, Abdessalem, et al. "FPGA Implementation of ML, ZF and MMSE Equalizers for MIMO Systems." Procedia Computer Science, vol. 73, 2015, pp. 226-233, https://doi.org/10.1016/j.procs.2015.12.022.