CMOS analog baseband circuitry for an IEEE 802.11 b/g/n WLAN transceiver

An analog baseband circuit for a direct conversion wireless local area network（WLAN） transceiver in a standard 0.13-μm CMOS occupying 1.26 mm~2 is presented.The circuit consists of active-RC receiver（RX） 4th order elliptic lowpass filters（LPFs）,transmitter（TX） 3rd order Chebyshev LPFs,RX programmabl...

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Bibliographic Details
Published inJournal of semiconductors Vol. 33; no. 11; pp. 60 - 66
Main Author 龚正 楚晓杰 雷倩倩 林敏 石寅
Format Journal Article
LanguageEnglish
Published 01.11.2012
Subjects
Amplification
Circuits
CMOS
Gain
IEEE
Local area networks
Noise levels
Semiconductors
Wireless networks
WLAN
可编程增益放大器
基带电路
收发器
椭圆低通滤波器
模拟
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ISSN1674-4926
DOI10.1088/1674-4926/33/11/115001

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Summary:An analog baseband circuit for a direct conversion wireless local area network（WLAN） transceiver in a standard 0.13-μm CMOS occupying 1.26 mm~2 is presented.The circuit consists of active-RC receiver（RX） 4th order elliptic lowpass filters（LPFs）,transmitter（TX） 3rd order Chebyshev LPFs,RX programmable gain amplifiers （PGAs） with DC offset cancellation（DCOC） servo loops,and on-chip output buffers.The RX baseband gain can be programmed in the range of -11 to 49 dB in 2 dB steps with 50-30.2 nV/（Hz）~（1/2） input referred noise（IRN） and a 21 to -41 dBm in-band 3rd order interception point（IIP3）.The RX/TX LPF cutoff frequencies can be switched between 5 MHz,10 MHz,and 20 MHz to fulfill the multimode 802.11b/g/n requirements.The TX baseband gain of the I/Q paths are tuned separately from -1.6 to 0.9 dB in 0.1 dB steps to calibrate TX 1/Q gain mismatches.By using an identical integrator based elliptic filter synthesis method together with global compensation applied to the LPF capacitor array,the power consumption of the RX LPF is considerably reduced and the proposed chip draws 26.8 mA/8 mA by the RX/TX baseband paths from a 1.2 V supply.
Bibliography:An analog baseband circuit for a direct conversion wireless local area network（WLAN） transceiver in a standard 0.13-μm CMOS occupying 1.26 mm~2 is presented.The circuit consists of active-RC receiver（RX） 4th order elliptic lowpass filters（LPFs）,transmitter（TX） 3rd order Chebyshev LPFs,RX programmable gain amplifiers （PGAs） with DC offset cancellation（DCOC） servo loops,and on-chip output buffers.The RX baseband gain can be programmed in the range of -11 to 49 dB in 2 dB steps with 50-30.2 nV/（Hz）~（1/2） input referred noise（IRN） and a 21 to -41 dBm in-band 3rd order interception point（IIP3）.The RX/TX LPF cutoff frequencies can be switched between 5 MHz,10 MHz,and 20 MHz to fulfill the multimode 802.11b/g/n requirements.The TX baseband gain of the I/Q paths are tuned separately from -1.6 to 0.9 dB in 0.1 dB steps to calibrate TX 1/Q gain mismatches.By using an identical integrator based elliptic filter synthesis method together with global compensation applied to the LPF capacitor array,the power consumption of the RX LPF is considerably reduced and the proposed chip draws 26.8 mA/8 mA by the RX/TX baseband paths from a 1.2 V supply.
11-5781/TN
WLAN analog baseband active-RC filters PGA DCOC operational amplifiers
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ISSN:1674-4926
DOI:10.1088/1674-4926/33/11/115001