High-speed hardware implementations of Elliptic Curve Cryptography: A survey

For the last decade, Elliptic Curve Cryptography (ECC) has gained increasing acceptance in the industry and the academic community and has been the subject of several standards. This interest is mainly due to the high level of security with relatively small keys provided by ECC. To sustain the high...

Full description

Saved in:
Bibliographic Details
Published inJournal of systems architecture Vol. 53; no. 2; pp. 72 - 84
Main Authors Meurice de Dormale, Guerric, Quisquater, Jean-Jacques
Format Journal Article
LanguageEnglish
Published Amsterdam Elsevier B.V 01.02.2007
Elsevier Sequoia S.A
Subjects
Online AccessGet full text
ISSN1383-7621
1873-6165
DOI10.1016/j.sysarc.2006.09.002

Cover

More Information
Summary:For the last decade, Elliptic Curve Cryptography (ECC) has gained increasing acceptance in the industry and the academic community and has been the subject of several standards. This interest is mainly due to the high level of security with relatively small keys provided by ECC. To sustain the high throughput required by applications like network servers, high-speed implementations of public-key cryptosystems are needed. For that purpose, hardware-based accelerators are often the only solution reaching an acceptable performance-cost ratio. The fundamental question that arises is how to choose the appropriate efficiency–flexibility tradeoff. In this survey, techniques for implementing Elliptic Curve Cryptography at a high-speed are explored. A classification of the work available in the open literature in function of the level of efficiency and flexibility is also proposed. In particular, the subjects of reconfigurable, dedicated, generator, versatile and general purpose scalar multipliers are addressed. Finally, some words about future work that should be tackled are provided.
Bibliography:SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 14
ISSN:1383-7621
1873-6165
DOI:10.1016/j.sysarc.2006.09.002