Exploiting the Logic-In-Memory paradigm for speeding-up data-intensive algorithms
In the last decades transistor scaling has driven electronics toward an extraordinary evolution. The ability to squeeze millions of transistors on a single chip makes it possible to have an incredible computational power in very small size. Many computational systems are still based on the Von Neuma...
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          | Published in | Integration (Amsterdam) Vol. 66; pp. 153 - 163 | 
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| Main Authors | , , , , , | 
| Format | Journal Article | 
| Language | English | 
| Published | 
        Amsterdam
          Elsevier B.V
    
        01.05.2019
     Elsevier BV  | 
| Subjects | |
| Online Access | Get full text | 
| ISSN | 0167-9260 1872-7522  | 
| DOI | 10.1016/j.vlsi.2019.02.007 | 
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| Summary: | In the last decades transistor scaling has driven electronics toward an extraordinary evolution. The ability to squeeze millions of transistors on a single chip makes it possible to have an incredible computational power in very small size. Many computational systems are still based on the Von Neumann architecture, where computational units and memory blocks are two separate entities. Nanometer-sized transistors enable the development of incredibly fast logic units that cannot work at full speed due to limitations in data transfer from memory. To further evolve electronic circuits, new innovative architectural solutions must be developed to overcome the main limitations of current systems. In this work, we present an architectural implementation of the Logic-In-Memory (LIM) concept that we characterize by considering three data-intensive benchmarks: the odd even sort, the integral image and the binomial filter. The architecture is synthesized on a 28 nm CMOS technology and it is validated by comparing it to a previous version of the LIM structure and to conventional architectures, showing an impressive increase in performance, in terms of speed gain and power consumption reduction.
•The Logic-in-Memory (LIM) architecture brings closer computation and storage.•In the LIM architecture, data memory access is optimized to speed up the computation.•The LIM architecture is fitted for parallel algorithms with a lot of data exchange.•In sorting algorithms, our LIM architecture performs better than a GPU and an ASIC.•Our LIM architecture is characterized by a much lower power consumption than a GPU. | 
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| Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14  | 
| ISSN: | 0167-9260 1872-7522  | 
| DOI: | 10.1016/j.vlsi.2019.02.007 |