A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level
In the past few years, Time-Dependent Variability has become a subject of growing concern in CMOS technologies. In particular, phenomena such as Bias Temperature Instability, Hot-Carrier Injection and Random Telegraph Noise can largely affect circuit reliability. It becomes therefore imperative to d...
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Published in | Integration (Amsterdam) Vol. 72; pp. 13 - 20 |
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Main Authors | , , , , , , , |
Format | Journal Article |
Language | English |
Published |
Amsterdam
Elsevier B.V
01.05.2020
Elsevier BV |
Subjects | |
Online Access | Get full text |
ISSN | 0167-9260 1872-7522 |
DOI | 10.1016/j.vlsi.2020.02.002 |
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Summary: | In the past few years, Time-Dependent Variability has become a subject of growing concern in CMOS technologies. In particular, phenomena such as Bias Temperature Instability, Hot-Carrier Injection and Random Telegraph Noise can largely affect circuit reliability. It becomes therefore imperative to develop reliability-aware design tools to mitigate their impact on circuits. To this end, these phenomena must be first accurately characterized and modeled. And, since all these phenomena reveal a stochastic nature for deeply-scaled integration technologies, they must be characterized massively on devices to extract the probability distribution functions associated to their characteristic parameters. In this work, a complete methodology to characterize these phenomena experimentally, and then extract the necessary parameters to construct a Time-Dependent Variability model, is presented. This model can be used by a reliability simulator.
•Complete Reliability-Aware Design flow is presented.•It includes characterization, modeling and simulation of Time-Dependent Variability.•Focus set on the automatic and robust extraction of parameters from TDV experiments. |
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Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
ISSN: | 0167-9260 1872-7522 |
DOI: | 10.1016/j.vlsi.2020.02.002 |