APA (7th ed.) Citation

Kohler, A., Schley, G., & Radetzki, M. (2010). Fault Tolerant Network on Chip Switching With Graceful Performance Degradation. IEEE transactions on computer-aided design of integrated circuits and systems, 29(6), 883-896. https://doi.org/10.1109/TCAD.2010.2048399

Chicago Style (17th ed.) Citation

Kohler, Adan, Gert Schley, and Martin Radetzki. "Fault Tolerant Network on Chip Switching With Graceful Performance Degradation." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems 29, no. 6 (2010): 883-896. https://doi.org/10.1109/TCAD.2010.2048399.

MLA (9th ed.) Citation

Kohler, Adan, et al. "Fault Tolerant Network on Chip Switching With Graceful Performance Degradation." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, vol. 29, no. 6, 2010, pp. 883-896, https://doi.org/10.1109/TCAD.2010.2048399.