Development of a multi-channel readout ASIC for a fast neutron spectrometer based on GEM-TPC

A multi-channel front-end ASIC has been developed for a fast neutron spectrometer based on Gas Electron Multiplier （GEM）-Time Projection Chamber （TPC）. Charge Amplifier and Shaping Amplifier for GEM （CASAGEM） integrates 16＋1 channels： 16 channels for anodes and 1 channel for cathode. The gain and th...

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Published inChinese physics C Vol. 38; no. 10; pp. 39 - 43
Main Author 何力 邓智 刘以农 李玉兰
Format Journal Article
LanguageEnglish
Published 01.10.2014
Subjects
Adjustable
Amplifiers
Channels
Chips
Circuit boards
CMOS工艺
Fast neutrons
Jitter
Spectrometers
专用集成电路
光谱仪
多通道
快中子
气体电子倍增器
电荷放大器
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ISSN1674-1137
0254-3052
DOI10.1088/1674-1137/38/10/106101

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Summary:A multi-channel front-end ASIC has been developed for a fast neutron spectrometer based on Gas Electron Multiplier （GEM）-Time Projection Chamber （TPC）. Charge Amplifier and Shaping Amplifier for GEM （CASAGEM） integrates 16＋1 channels： 16 channels for anodes and 1 channel for cathode. The gain and the shaping time are adjustable from 2 to 40 mV/fC and from 20 to 80 ns, respectively. The prototype ASIC is fabricated in 0.35 μm CMOS process. An evaluation Print Circuit Board （PCB） was also developed for chip tests. In total 20 chips have been tested. The integrated nonlinearity is less than 1%. The equivalent noise electrons is less than 2000e when the input capacitor is 50 pF. The time jitter is less than 1 ns. The design and the test results are presented in the paper.
Bibliography:A multi-channel front-end ASIC has been developed for a fast neutron spectrometer based on Gas Electron Multiplier （GEM）-Time Projection Chamber （TPC）. Charge Amplifier and Shaping Amplifier for GEM （CASAGEM） integrates 16＋1 channels： 16 channels for anodes and 1 channel for cathode. The gain and the shaping time are adjustable from 2 to 40 mV/fC and from 20 to 80 ns, respectively. The prototype ASIC is fabricated in 0.35 μm CMOS process. An evaluation Print Circuit Board （PCB） was also developed for chip tests. In total 20 chips have been tested. The integrated nonlinearity is less than 1%. The equivalent noise electrons is less than 2000e when the input capacitor is 50 pF. The time jitter is less than 1 ns. The design and the test results are presented in the paper.
11-5641/O4
front-end, readout electronics, ASIC, TPC, GEM
HE Li, DENG Zhi, LIU Yi-Nong, LI Yu-Lan （1 Key Laboratory of Particle ＆ Radiation Imaging （Tsinghua University）, Ministry of Education, Beijing 100084, China; 2 Department of Engineering Physics, Tsinghua University, Beijing 100084, China）
ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISSN:1674-1137
0254-3052
DOI:10.1088/1674-1137/38/10/106101