Prototype of time digitizing system for BESⅢ endcap TOF upgrade

The prototype of a time digitizing system for the BESⅢ endcap TOF （ETOF） upgrade is introduced in this paper, The ETOF readout electronics has a distributed architecture. Hit signals from the multi-gap resistive plate chamber （MRPC） are signaled as LVDS by front-end electronics （FEE） and are then se...

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Bibliographic Details
Published inChinese physics C Vol. 38; no. 4; pp. 55 - 63
Main Author 曹平 孙维佳 季筱璐 范欢欢 王思宇 刘树彬 安琪
Format Journal Article
LanguageEnglish
Published 01.04.2014
Subjects
Architecture
Barrels (containers)
BES
Control systems
Digitizing
Electronics
Modules
Prototypes
Shields
TOF
分布式体系结构
原型
多气隙电阻板室
数字化系统
时间分辨率
端盖
Online AccessGet full text
ISSN1674-1137
0254-3052
DOI10.1088/1674-1137/38/4/046101

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Summary:The prototype of a time digitizing system for the BESⅢ endcap TOF （ETOF） upgrade is introduced in this paper, The ETOF readout electronics has a distributed architecture. Hit signals from the multi-gap resistive plate chamber （MRPC） are signaled as LVDS by front-end electronics （FEE） and are then sent to the back-end time digitizing system via long shield differential twisted pair cables. The ETOF digitizing system consists of two VME crates, each of which contains modules for time digitization, clock, trigger, fast control, etc. The time digitizing module （TDIG） of this prototype can support up to 72 electrical channels for hit information measurement. The fast control （FCTL） module can operate in barrel or endcap mode. The barrel FCTL fans out fast control signals from the trigger system to the endcap FCTLs, merges data from the endcaps and then transfers to the trigger system. Without modifying the barrel TOF （BTOF） structure, this time digitizing architecture benefits from improved ETOF performance without degrading the BTOF performance. Lab experiments show that the time resolution of this digitizing system can be lower than 20 ps, and the data throughput to the DAQ can be about 92 Mbps. Beam experiments show that the total time resolution can be lower than 45 ps.
Bibliography:BESⅢ, endcap upgrade, time-of-flight, high precision time measurement, readout electronics
11-5641/O4
CAO Ping SUN Wei-Jia Jl Xiao-Lu FAN Huan-Huan WANG Si-Yu LIU Shu-Bin AN Qi（1 State Key Laboratory of Particle Detection and Electronics, Hefei 230026, China 2 Anhui Key Laboratory of Physical Electronics, Department of Modern Physics, University of Science and Technology of China, Hefei 230026, China 3 Institute of High Energy Physics, Chinese Academy of Sciences, Beijing 100049, China）
The prototype of a time digitizing system for the BESⅢ endcap TOF （ETOF） upgrade is introduced in this paper, The ETOF readout electronics has a distributed architecture. Hit signals from the multi-gap resistive plate chamber （MRPC） are signaled as LVDS by front-end electronics （FEE） and are then sent to the back-end time digitizing system via long shield differential twisted pair cables. The ETOF digitizing system consists of two VME crates, each of which contains modules for time digitization, clock, trigger, fast control, etc. The time digitizing module （TDIG） of this prototype can support up to 72 electrical channels for hit information measurement. The fast control （FCTL） module can operate in barrel or endcap mode. The barrel FCTL fans out fast control signals from the trigger system to the endcap FCTLs, merges data from the endcaps and then transfers to the trigger system. Without modifying the barrel TOF （BTOF） structure, this time digitizing architecture benefits from improved ETOF performance without degrading the BTOF performance. Lab experiments show that the time resolution of this digitizing system can be lower than 20 ps, and the data throughput to the DAQ can be about 92 Mbps. Beam experiments show that the total time resolution can be lower than 45 ps.
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ISSN:1674-1137
0254-3052
DOI:10.1088/1674-1137/38/4/046101