Hot carrier degradation and a new lifetime prediction model in ultra-deep sub-micron pMOSFET
The hot carrier effect (HCE) of an ultra-deep sub-micron p-channel metal–oxide semiconductor field-effect transistor (pMOSFET) is investigated in this paper. Experiments indicate that the generation of positively charged interface states is the predominant mechanism in the case of the ultra-deep sub...
        Saved in:
      
    
          | Published in | Chinese physics B Vol. 22; no. 4; pp. 434 - 437 | 
|---|---|
| Main Author | |
| Format | Journal Article | 
| Language | English | 
| Published | 
          
        01.04.2013
     | 
| Subjects | |
| Online Access | Get full text | 
| ISSN | 1674-1056 2058-3834 1741-4199  | 
| DOI | 10.1088/1674-1056/22/4/047304 | 
Cover
| Summary: | The hot carrier effect (HCE) of an ultra-deep sub-micron p-channel metal–oxide semiconductor field-effect transistor (pMOSFET) is investigated in this paper. Experiments indicate that the generation of positively charged interface states is the predominant mechanism in the case of the ultra-deep sub-micron pMOSFET. The relation of the pMOSFET hot carrier degradation to stress time (t), channel width (W ), channel length (L), and stress voltage (Vd ) is then discussed. Based on the relation, a lifetime prediction model is proposed, which can predict the lifetime of the ultra-deep sub-micron pMOSFET accurately and reflect the influence of the factors on hot carrier degradation directly. | 
|---|---|
| Bibliography: | Lei Xiao-Yi , Liu Hong-Xia , Zhang Kai, Zhang Yue, Zheng Xue-Feng, Ma Xiao-Hua , Hao Yue( a) a) Key Laboratory of Wide Bandgap Semiconductor Materials and Devices of Ministry of Education, State Key Discipline Laboratory of Wide Bandgap Semiconductor Technologies, School of Microelectronics, Xidian University, Xi’an 710071, China b) School of Technical Physics, Xidian University, Xi’an 710071, China The hot carrier effect (HCE) of an ultra-deep sub-micron p-channel metal–oxide semiconductor field-effect transistor (pMOSFET) is investigated in this paper. Experiments indicate that the generation of positively charged interface states is the predominant mechanism in the case of the ultra-deep sub-micron pMOSFET. The relation of the pMOSFET hot carrier degradation to stress time (t), channel width (W ), channel length (L), and stress voltage (Vd ) is then discussed. Based on the relation, a lifetime prediction model is proposed, which can predict the lifetime of the ultra-deep sub-micron pMOSFET accurately and reflect the influence of the factors on hot carrier degradation directly. pMOSFETs; hot carrier effect (HCE); degradation; lifetime modeling 11-5639/O4 ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23  | 
| ISSN: | 1674-1056 2058-3834 1741-4199  | 
| DOI: | 10.1088/1674-1056/22/4/047304 |