A General Construction and Encoder Implementation of Polar Codes
Puncturing and shortening are two general ways to obtain an arbitrary code length and code rate for polar codes. When some of the coded bits are punctured or shortened, it is equivalent to a situation in which the underlying channels of polar codes are different. This fact calls for a general polar...
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| Published in | IEEE transactions on very large scale integration (VLSI) systems Vol. 28; no. 7; pp. 1690 - 1702 |
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| Main Authors | , , , , |
| Format | Journal Article |
| Language | English |
| Published |
New York
IEEE
01.07.2020
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subjects | |
| Online Access | Get full text |
| ISSN | 1063-8210 1557-9999 |
| DOI | 10.1109/TVLSI.2020.2983327 |
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| Summary: | Puncturing and shortening are two general ways to obtain an arbitrary code length and code rate for polar codes. When some of the coded bits are punctured or shortened, it is equivalent to a situation in which the underlying channels of polar codes are different. This fact calls for a general polar code construction, which is not yet available. In this article, a general construction of polar codes is studied in two aspects: 1) the theoretical foundation of the general construction and 2) the hardware implementation of general polar codes encoders. In contrast to the original identical and independent binary-input, memoryless, symmetric (BMS) channels, these underlying BMS channels can be different. The proposed general construction of polar codes is based on the existing Tal-Vardy's procedure. The symmetric property and the degradation relationship are shown to be preserved under the general setting, rendering the possibility of a modification of Tal-Vardy's procedure. Simulation results clearly show improved error performance with reordering using the proposed new procedures. Also, a novel encoding hardware architecture is proposed, which supports puncturing and shortening modes. Implementation results show the proposed encoder achieves approximately 30% throughput improvement when one quarter of bits are punctured/shortened. |
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| Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
| ISSN: | 1063-8210 1557-9999 |
| DOI: | 10.1109/TVLSI.2020.2983327 |