APA (7th ed.) Citation

Chaurasiya, R. B., & Shrestha, R. (2022). Hardware-Efficient VLSI Architecture and ASIC Implementation of GRCR-Based Cooperative Spectrum Sensor for Cognitive-Radio Network. IEEE transactions on very large scale integration (VLSI) systems, 30(2), 166-176. https://doi.org/10.1109/TVLSI.2021.3114859

Chicago Style (17th ed.) Citation

Chaurasiya, Rohit B., and Rahul Shrestha. "Hardware-Efficient VLSI Architecture and ASIC Implementation of GRCR-Based Cooperative Spectrum Sensor for Cognitive-Radio Network." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30, no. 2 (2022): 166-176. https://doi.org/10.1109/TVLSI.2021.3114859.

MLA (9th ed.) Citation

Chaurasiya, Rohit B., and Rahul Shrestha. "Hardware-Efficient VLSI Architecture and ASIC Implementation of GRCR-Based Cooperative Spectrum Sensor for Cognitive-Radio Network." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, no. 2, 2022, pp. 166-176, https://doi.org/10.1109/TVLSI.2021.3114859.