FPGA Implementation of an Evolutionary Algorithm for Autonomous Unmanned Aerial Vehicle On-Board Path Planning

• Published in: IEEE transactions on evolutionary computation Vol. 17; no. 2; pp. 272 - 281
• Main Authors: Kok, J., Gonzalez, L. F., Kelson, N.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.04.2013; Institute of Electrical and Electronics Engineers
• Subjects: Algorithmics. Computability. Computer arithmetics; Applied sciences; Artificial intelligence; Biological cells; Computer architecture; Computer science; control theory; systems; Control theory. Systems; Convergence; Evolutionary algorithm (EA); Exact sciences and technology; Field programmable gate arrays; field-programmable gate array (FPGA); Genetic algorithms; Hardware; Learning and adaptive systems; Path planning; Robotics; Theoretical computing; unmanned aerial vehicle (UAV); Energy consumption; unmanned aerial vehicle (UAV); Helicopter; Process planning; Evolutionary algorithm (EA); Evolutionary algorithm; Updating; Field programmable gate array; Path planning; Autopilot; Low power; field-programmable gate array (FPGA); Circuit architecture; Unmanned aerial vehicle; Optimal trajectory; Convergence rate; Autonomy; Numerical convergence
• ISSN: 1089-778X; 1941-0026
• DOI: 10.1109/TEVC.2012.2192124

In this paper, a hardware-based path planning architecture for unmanned aerial vehicle (UAV) adaptation is proposed. The architecture aims to provide UAVs with higher autonomy using an application-specific evolutionary algorithm (EA) implemented entirely on a field-programmable gate array (FPGA) chip. The physical attributes of an FPGA chip, being compact in size and low in power consumption, makes it an ideal platform for UAV applications. The design, which is implemented entirely in hardware, consists of EA modules, population storage resources, and 3-D terrain information necessary to the path planning process, subject to constraints accounted for separately via UAV, environment, and mission profiles. The architecture has been successfully synthesized for a target Xilinx Virtex-4 FPGA platform with 32% logic slice utilization. Results obtained from case studies for a small UAV helicopter with environment derived from light-detection and ranging data verify the effectiveness of the proposed FPGA-based pathplanner, and demonstrate convergence at rates above the typical 10 Hz update frequency of an autopilot system.