Circuit Learning: From Decision Trees to Decision Graphs

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 42; no. 11; p. 1
• Main Authors: Huang, Yu-Shan, Jiang, Jie-Hong R.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.11.2023; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Boolean functions; Circuit design; Constraints; Decision trees; Integrated circuit modeling; Machine learning; Merging; Predictive models; Task analysis; Training
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2023.3258747

Circuit learning has gained significant attention due to machine learning advancements and approximate synthesis applications. The task is to learn a circuit to model an unknown Boolean function subject to different design constraints. When circuit size is hard-constrained, decision-tree-based learning plays a crucial role in state-of-the-art methods. However, it can be ineffective due to its structural restriction. This work proposes graph learning to overcome the limitation, provide trade-offs between circuit size and accuracy, and enrich the portfolio of circuit learning tools. Experimental results show the superiority of our approach to prior work in accuracy, training time, and circuit size.