A Forward Compensation Method to Eliminate DC Phase Error in SRF-PLL

• Published in: IEEE transactions on power electronics Vol. 37; no. 6; pp. 6280 - 6284
• Main Authors: Wang, Yuchen, Zhang, Hengliang, Liu, Kai, Hu, Mingjin, Wu, Zheng, Zhang, Chao, Hua, Wei
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.06.2022; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Compensation; DC phase error; forward compensation; Motor drives; Phase error; Phase locked loops; Power electronics; Power system stability; Robustness (mathematics); Stability; Stability criteria; synchronous-reference-frame-phase locked loop (SRF-PLL); Tuning; Voltage-controlled oscillators
• ISSN: 0885-8993; 1941-0107
• DOI: 10.1109/TPEL.2022.3142252

The Type-II synchronous-reference-frame (SRF) phase locked loop (PLL) fails to precisely keep tracking on phase of input signals when the frequency of input signals is under ramp state, whereas the type-III SRF-PLL addresses the above issue but stability problem arises. In this letter, a forward compensation (FC) module is introduced to the Type-II SRF-PLL to minimize the dc phase error due to the ramp frequency of input signals, named as FCSRF-PLL, which features low computational burden, simple structure, noise immunity, and high robustness. More importantly, the parameter tuning in the proposed method will not cause stability problem. The effectiveness of the proposed FCSRF-PLL is verified through experiments based on dSPACE.