A hybrid discontinuous PWM algorithm of balancing neutral point voltage for 3L‐NPC inverter

• Published in: International journal of circuit theory and applications Vol. 49; no. 12; pp. 4120 - 4141
• Main Authors: Zhong, Liping, Hu, Song
• Format: Journal Article
• Language: English
• Published: Bognor Regis Wiley Subscription Services, Inc 01.12.2021
• Subjects: Algorithms; Clamping; clamping type; Dwell time; Electric potential; hybrid discontinuous pulsewidth modulation; Inverters; Modulation; neutral point voltage balancing; output level sequence type; Pulse duration; space vector pulsewidth modulation; Switching; Voltage
• ISSN: 0098-9886; 1097-007X
• DOI: 10.1002/cta.3079

Wider linear modulation range, less switching loss, and simplicity are the goals pursued by various modulation methods of multilevel inverters. This paper proposes a new hybrid discontinuous pulsewidth modulation (HDPWM) strategy for three‐level neutral‐point‐clamped (3L‐NPC) inverter that can achieve the above goals to a certain extent. According to the position of the reference voltage vector and the actual situation of the neutral point voltage, different control modes and clamping types are selected. The neutral point voltage is controlled by DPWM strategy, which can not only greatly reduce the switch loss but also maintain the balance of the neutral point voltage and expand the linear modulation range. The implementation of the algorithm combines the advantages of carrier‐based PWM (CBPWM) and space vector PWM (SVPWM). There is no need to select the nearest three vectors (NTVs) and calculate their dwell time. Only the reference voltage needs to be modified according to the control requirements, and then by comparing the modified reference voltage with the carrier, the driver pulse required by the switching devices can be generated. Compared with the existing PWM methods, it is more simple and easy to implement. Experimental results verify the validity of the method. (1) The NP voltage is balanced by selecting different clamping types in real time. (2) The idea of discontinuous PWM (DPWM) is adopted, and through a special carrier comparison method, the switching times can be reduced by 1/3. (3) The advantages of SVPWM and CBPWM are combined to generate driving pulse, which saves the complex process of voltage vector synthesis and makes the algorithm easy to implement.