Berrima, S., Blaquière, Y., & Savaria, Y. (2018). Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits. Integration (Amsterdam), 62, 159-169. https://doi.org/10.1016/j.vlsi.2018.02.010
Chicago Style (17th ed.) CitationBerrima, Safa, Yves Blaquière, and Yvon Savaria. "Diagnosis Algorithms for a Reconfigurable and Defect Tolerant JTAG Scan Chain in Large Area Integrated Circuits." Integration (Amsterdam) 62 (2018): 159-169. https://doi.org/10.1016/j.vlsi.2018.02.010.
MLA (9th ed.) CitationBerrima, Safa, et al. "Diagnosis Algorithms for a Reconfigurable and Defect Tolerant JTAG Scan Chain in Large Area Integrated Circuits." Integration (Amsterdam), vol. 62, 2018, pp. 159-169, https://doi.org/10.1016/j.vlsi.2018.02.010.