Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer

• Published in: Chinese physics B Vol. 25; no. 4; pp. 450 - 455
• Main Author: 马达 罗小蓉 魏杰 谭桥 周坤 吴俊峰
• Format: Journal Article
• Language: English
• Published: 01.04.2016
• Subjects: Diffusion; Diffusion layers; Drains; Electric potential; Field effect transistors; Gates; Trenches; VDMOS; Voltage; 低导通电阻; 双扩散; 垂直; 电子; 积累; 金属氧化物半导体场效应晶体管; 高压
• ISSN: 1674-1056; 2058-3834; 1741-4199
• DOI: 10.1088/1674-1056/25/4/048502

A new ultra-low specific on-resistance （Ron,sp） vertical double diffusion metal-oxide-semiconductor field-effect tran- sistor （VDMOS） with continuous electron accumulation （CEA） layer, denoted as CEA-VDMOS, is proposed and its new current transport mechanism is investigated. It features a trench gate directly extended to the drain, which includes two PN junctions. In on-state, the electron accumulation layers are formed along the sides of the extended gate and introduce two continuous low-resistance current paths from the source to the drain in a cell pitch. This mechanism not only dramatically reduces the Ron,sp but also makes the Ron,sp almost independent of the n-pillar doping concentration （Am）. In off-state, the depletion between the n-pillar and p-pillar within the extended trench gate increases the Nn, and further reduces the Ron,sp. Especially, the two PNjunctions within the trench gate support a high gate--drain voltage in the off-state and on-state, re- spectively. However, the extended gate increases the gate capacitance and thus weakens the dynamic performance to some extent. Therefore, the CEA-VDMOS is more suitable for low and medium frequencies application. Simulation indicates that the CEA-VDMOS reduces the Ron,sp by 80% compared with the conventional super-junction VDMOS （CSJ-VDMOS） at the same high breakdown voltage （BV）.