Influence of gate-source/drain misalignment on the performance of bulk FinFETs by a 3D full band Monte Carlo simulation

We investigate the influence of gate-source/drain (G-S/D) misalignment on the performance of bulk fin field effect transistors (FinFETs) through the three-dimensional (3D) full band Monte Carlo simulator. Several scat- tering mechanisms, such as acoustic and optical phonon scattering, ionized impuri...

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Published inJournal of semiconductors Vol. 34; no. 4; pp. 42 - 45
Main Author 王骏成 杜刚 魏康亮 曾琅 张兴 刘晓彦
Format Journal Article
LanguageEnglish
Published 01.04.2013
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ISSN1674-4926
DOI10.1088/1674-4926/34/4/044005

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Summary:We investigate the influence of gate-source/drain (G-S/D) misalignment on the performance of bulk fin field effect transistors (FinFETs) through the three-dimensional (3D) full band Monte Carlo simulator. Several scat- tering mechanisms, such as acoustic and optical phonon scattering, ionized impurity scattering, impact ionization scattering and surface roughness scattering are considered in our simulator. The influence of G-S/D overlap and underlap on the on-states performance and carrier transport of bulk FinFETs are mainly discussed in our work. Our results show that the on-states currents increase with the increment of G-D/S overlap length and the positions of a potential barrier and average electron energy maximum vary with the G-D/S overlap length. The carrier transport phenomena in bulk FinFETs are due to the effect of scattering and the electric field in the overlap/underlap regime.
Bibliography:We investigate the influence of gate-source/drain (G-S/D) misalignment on the performance of bulk fin field effect transistors (FinFETs) through the three-dimensional (3D) full band Monte Carlo simulator. Several scat- tering mechanisms, such as acoustic and optical phonon scattering, ionized impurity scattering, impact ionization scattering and surface roughness scattering are considered in our simulator. The influence of G-S/D overlap and underlap on the on-states performance and carrier transport of bulk FinFETs are mainly discussed in our work. Our results show that the on-states currents increase with the increment of G-D/S overlap length and the positions of a potential barrier and average electron energy maximum vary with the G-D/S overlap length. The carrier transport phenomena in bulk FinFETs are due to the effect of scattering and the electric field in the overlap/underlap regime.
bulk FinFET; gate-source/drain misalignment; 3D Monte Carlo simulation; carrier transport
11-5781/TN
Wang Juncheng, Du Gang, Wei Kangliang, Zeng Lang, Zhang Xing, and Liu Xiaoyan Institute of Microelectronics, Peking University, Beijing 100871, China
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ISSN:1674-4926
DOI:10.1088/1674-4926/34/4/044005