A Direct Digital Synthesis Transmitter for 5G Applications With Low-Resolution DACs

Conventional radio frequency (RF) transmitters frequently necessitate a pair of high-resolution, high-speed digital-to-analog converters (DACs) to ensure a specific level of linearity in wireless communication systems. Nevertheless, the high-resolution DACs escalate power consumption and area requir...

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Published inIEEE transactions on circuits and systems. II, Express briefs Vol. 71; no. 9; pp. 4166 - 4170
Main Authors Chang, Yu-Chen, Chen, You-Huei, Chen, Jau-Horng, Chen, Yi-Jan Emery
Format Journal Article
LanguageEnglish
Published New York IEEE 01.09.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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ISSN1549-7747
1558-3791
DOI10.1109/TCSII.2024.3381527

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Summary:Conventional radio frequency (RF) transmitters frequently necessitate a pair of high-resolution, high-speed digital-to-analog converters (DACs) to ensure a specific level of linearity in wireless communication systems. Nevertheless, the high-resolution DACs escalate power consumption and area requirements and intensify the need for heat dissipation mechanisms. This brief presents a direct digital synthesis (DDS) transmitter using a pair of RF DACs with just 2 bits of resolution. The DDS transmitter, which uses a proposed digital pulse-width modulation signal with dithering, is resistant to power amplifier (PA) nonlinearity. Tested with 5G uplink signals and a pair of nonlinear PAs at 836.5 MHz, the transmitter could pass the stringent spectral requirements for 5G applications without using any digital predistortion or calibration techniques.
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ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2024.3381527