Zhu, D., Tian, J., Li, M., & Wang, Z. (2023). Low-latency Hardware Architecture for VDF Evaluation in Class Groups. IEEE transactions on computers, 72(6), 1706-1717. https://doi.org/10.1109/TC.2022.3219723
Chicago Style (17th ed.) CitationZhu, Danyang, Jing Tian, Minghao Li, and Zhongfeng Wang. "Low-latency Hardware Architecture for VDF Evaluation in Class Groups." IEEE Transactions on Computers 72, no. 6 (2023): 1706-1717. https://doi.org/10.1109/TC.2022.3219723.
MLA (9th ed.) CitationZhu, Danyang, et al. "Low-latency Hardware Architecture for VDF Evaluation in Class Groups." IEEE Transactions on Computers, vol. 72, no. 6, 2023, pp. 1706-1717, https://doi.org/10.1109/TC.2022.3219723.
Warning: These citations may not always be 100% accurate.