Performance and Security Evaluation of S-Box Using Current-Pass Optimized Symmetric Pass Gate Adiabatic Logic

• Published in: SN computer science Vol. 1; no. 4; p. 199
• Main Authors: Koyasu, Hiroki, Takahashi, Yasuhiro
• Format: Journal Article
• Language: English
• Published: Singapore Springer Singapore 01.07.2020; Springer Nature B.V
• Subjects: Adiabatic flow; Computer Imaging; Computer Science; Computer Systems Organization and Communication Networks; Cryptography; Data Structures and Information Theory; Design; Energy consumption; Information Systems and Communication Service; Internet of Things; Logic; Original Research; Pattern Recognition and Graphics; Performance evaluation; Power consumption; Power supply; Software Engineering/Programming and Operating Systems; Transistors; Vision; Waveforms; Current trace; Dual rail logic; Secure; Adiabatic logic
• ISSN: 2662-995X; 2661-8907; 2661-8907
• DOI: 10.1007/s42979-020-00212-0

Secure adiabatic logics are identified as the optimal solution for cryptographic modules. We previously proposed an adiabatic logic called Current-Pass Optimized Symmetric Pass Gate Adiabatic Logic (CPO-SPGAL). The proposed CPO-SPGAL realizes a flat current waveform by considering the current path compared with conventional adiabatic logics. In this paper, to confirm more details about countermeasure against power analysis attacks, we compare S-box circuits based on the conventional and proposed adiabatic logics which are implemented using 0.18 μ m standard CMOS. From the SPICE simulation for correlation power analysis (CPA), 409,600 power consumption traces are obtained, and the hamming distance/weight are calculated. The simulation results show that the proposed S-box is more resistant to CPA attacks than the existing adiabatic S-boxes.