IMPLEMENTATION OF GRADIENT BASED ADAPTIVE INTERPOLATION ON FPGA

FPGA (Field Programmable Gate Array) structure can exploit the temporal and spatial parallelism of the system, subject to hardware constraints and processing mode of the system. Due to this property, real time image processing algorithms can implemented using this platform. Now a days High level Syn...

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Bibliographic Details
Published inInternational journal of advanced research in computer science Vol. 8; no. 8; pp. 312 - 314
Main Author Patel, Usha
Format Journal Article
LanguageEnglish
Published Udaipur International Journal of Advanced Research in Computer Science 01.09.2017
Subjects
Field programmable gate arrays
High level synthesis
Image processing
Interpolation
Microprocessors
Real time
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ISSN0976-5697
0976-5697
DOI10.26483/ijarcs.v8i8.4704

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Summary:FPGA (Field Programmable Gate Array) structure can exploit the temporal and spatial parallelism of the system, subject to hardware constraints and processing mode of the system. Due to this property, real time image processing algorithms can implemented using this platform. Now a days High level Synthesis Tools (HLS) available. Which can used to configure FPGA. This paper presents a real time implementation of gradientbased adaptive interpolation using HLS. We received a speedup of 14X over general purpose processor.
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ISSN:0976-5697
0976-5697
DOI:10.26483/ijarcs.v8i8.4704