Panel-Scale Reconfigurable Photonic Interconnects for Scalable AI Computation

• Published in: IEEE open journal of solid-state circuits p. 1
• Main Authors: Hsueh, Tzu-Chien, Lin, Bill, Chen, Zijun, Fainman, Yeshaiahu
• Format: Journal Article
• Language: English
• Published: IEEE 10.10.2025
• Subjects: Accelerator; Artificial intelligence; bandwidth density; chiplet-to-chiplet communication; edge coupler; energy efficiency; frequency comb; Glass; heterogeneous integration; high-bandwidth memory; High-speed optical techniques; Integrated circuit interconnections; Integrated optics; interconnect; interposer; large language model; micro bump; micro-ring resonator; optical communication; Optical device fabrication; Optical interconnections; Optical switches; packaging; Photonics; power delivery; power density; processor; racetrack resonator; silicon photonics; Substrates; through-silicon via; through-substrate via; wavelength division multiplexing
• ISSN: 2644-1349; 2644-1349
• DOI: 10.1109/OJSSCS.2025.3620371

Panel-scale reconfigurable photonic interconnects on a glass substrate up to 500-mm × 500-mm or larger are envisioned by proposing a novel photonic switch fabric that enables all directional panel-edge-to-panel-edge reach without active repeaters while offering high communication bandwidth, planar-direction reconfigurability, low energy consumption, and compelling data bandwidth density for heterogeneous integration of an in-package artificial-intelligence computing system on a photonic interposer exceeding thousands of centimeters square. The proposed approach focuses on reconfigurable photonic interconnects, which are integration-compatible with commercial processor chiplets and 3D high-bandwidth memory stacks, to create a novel panel-scale heterogeneously integrated package enabled by high-capacity wavelength-division-multiplexing optical data links using advanced optical modulators, broadband photodetectors, novel optical crossbar switches with multi-layer waveguides, and on-chip frequency comb sources.