Sensor-Level Anomaly Detection in DC–DC Buck Converters with a Physics-Informed LSTM: DSP-Based Validation of Detection and a Simulation Study of CI-Guided Deception

• Published in: Applied sciences Vol. 15; no. 20; p. 11112
• Main Authors: Moon, Jeong-Hoon, Kim, Jin-Hong, Lee, Jung-Hwan
• Format: Journal Article
• Language: English
• Published: Basel MDPI AG 16.10.2025
• Subjects: Algorithms; Bandwidths; Bias; Fault diagnosis; Feedback; Physics; Sensors; Simulation
• ISSN: 2076-3417; 2076-3417
• DOI: 10.3390/app152011112

Digitally controlled DC–DC converters are vulnerable to sensor-side spoofing, motivating plant-level anomaly detection that respects the converter physics. We present a physics-informed LSTM (PI–LSTM) autoencoder for a 24→12 V buck converter. The model embeds discrete-time circuit equations as residual penalties and uses a fixed decision rule (τ=μ+3σ, N=3 consecutive samples). We study three voltage-sensing attacks (DC bias, fixed-sample delay, and narrowband noise) in MATLAB/Simulink. We then validate the detection path on a TMS320F28379 DSP. The detector attains F1 scores of 96.12%, 91.91%, and 97.50% for bias, delay, and noise (simulation); on hardware, it achieves 2.9–4.2 ms latency with an alarm-wise FPR of ≤1.2%. We also define a unified safety box for DC rail quality and regulation. In simulations, we evaluate a confusion index (CI) policy for safety-bounded performance adjustment. A operating point yields CI≈0.25 while remaining within the safety limits. In hardware experiments without CI actuation, the Vr,pp and IRR stayed within the limits, whereas the ±2% regulation window was occasionally exceeded under the delay attack (up to ≈2.8%). These results indicate that physics-informed detection is deployable on resource-constrained controllers with millisecond-scale latency and a low alarm-wise FPR, while the full hardware validation of CI-guided deception (safety-bounded performance adjustment) under the complete safety box is left to future work.