Implementing sparse matrix-vector multiplication on throughput-oriented processors

Sparse matrix-vector multiplication (SpMV) is of singular importance in sparse linear algebra. In contrast to the uniform regularity of dense linear algebra, sparse operations encounter a broad spectrum of matrices ranging from the regular to the highly irregular. Harnessing the tremendous potential...

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Bibliographic Details
Published inProceedings of the Conference on High Performance Computing Networking, Storage and Analysis pp. 1 - 11
Main Authors Bell, Nathan, Garland, Michael
Format Conference Proceeding
LanguageEnglish
Published New York, NY, USA ACM 14.11.2009
SeriesACM Conferences
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ISBN1605587443
9781605587448
ISSN2167-4329
DOI10.1145/1654059.1654078

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Summary:Sparse matrix-vector multiplication (SpMV) is of singular importance in sparse linear algebra. In contrast to the uniform regularity of dense linear algebra, sparse operations encounter a broad spectrum of matrices ranging from the regular to the highly irregular. Harnessing the tremendous potential of throughput-oriented processors for sparse operations requires that we expose substantial fine-grained parallelism and impose sufficient regularity on execution paths and memory access patterns. We explore SpMV methods that are well-suited to throughput-oriented architectures like the GPU and which exploit several common sparsity classes. The techniques we propose are efficient, successfully utilizing large percentages of peak bandwidth. Furthermore, they deliver excellent total throughput, averaging 16 GFLOP/s and 10 GFLOP/s in double precision for structured grid and unstructured mesh matrices, respectively, on a GeForce GTX 285. This is roughly 2.8 times the throughput previously achieved on Cell BE and more than 10 times that of a quad-core Intel Clovertown system.
ISBN:1605587443
9781605587448
ISSN:2167-4329
DOI:10.1145/1654059.1654078