EMGraph: Fast Learning-Based Electromigration Analysis for Multi-Segment Interconnect Using Graph Convolution Networks

• Published in: 2021 58th ACM/IEEE Design Automation Conference (DAC) pp. 919 - 924
• Main Authors: Jin, Wentian, Chen, Liang, Sadiqbatcha, Sheriff, Peng, Shaoyi, Tan, Sheldon X.-D.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 05.12.2021
• Subjects: Convolution; Electromigration; Electromigration (EM); Generative adversarial networks; graph convolution network (GCN); hydrostatic stress assessment; Image edge detection; Integrated circuit interconnections; multisegment interconnect; Predictive models; Very large scale integration
• DOI: 10.1109/DAC18074.2021.9586239

Electromigration (EM) becomes a major concern for VLSI circuits as the technology advances in the nanometer regime. With Korhonen equations, EM assessment for VLSI circuits remains challenged due to the increasing integrated density. VLSI multisegment interconnect trees can be naturally viewed as graphs. Based on this observation, we propose a new graph convolution network (GCN) model, which is called EMGraph considering both node and edge embedding features, to estimate the transient EM stress of interconnect trees. Compared with recently proposed generative adversarial network (GAN) based stress image-generation method, EMGraph model can learn more transferable knowledge to predict stress distributions on new graphs without retraining via inductive learning. Trained on the large dataset, the model shows less than 1.5% averaged error compared to the ground truth results and is orders of magnitude faster than both COMSOL and state-of-the-art method. It also achieves smaller model size, 4\times accuracy and 14\times speedup over the GAN-based method.