mlirSynth: Automatic, Retargetable Program Raising in Multi-Level IR Using Program Synthesis

MLIR is an emerging compiler infrastructure for modern hardware, but existing programs cannot take advantage of MLIR's high-performance compilation if they are described in lower-level general purpose languages. Consequently, to avoid programs needing to be rewritten manually, this has led to e...

Full description

Saved in:
Bibliographic Details
Published in2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT) pp. 39 - 50
Main Authors Brauckmann, Alexander, Polgreen, Elizabeth, Grosser, Tobias, O'Boyle, Michael F. P.
Format Conference Proceeding
LanguageEnglish
Published IEEE 21.10.2023
Subjects
Online AccessGet full text
DOI10.1109/PACT58117.2023.00012

Cover

More Information
Summary:MLIR is an emerging compiler infrastructure for modern hardware, but existing programs cannot take advantage of MLIR's high-performance compilation if they are described in lower-level general purpose languages. Consequently, to avoid programs needing to be rewritten manually, this has led to efforts to automatically raise lower-level to higher-level dialects in MLIR. However, current methods rely on manually-defined raising rules, which limit their applicability and make them challenging to maintain as MLIR dialects evolve. We present mlirSynth - a novel approach which translates programs from lower-level MLIR dialects to high-level ones without manually defined rules. Instead, it uses available dialect definitions to construct a program space and searches it effectively using type constraints and equivalences. We demonstrate its effectiveness by raising C programs to two distinct high-level MLIR dialects, which enables us to use existing high-level dialect specific compilation flows. On Polybench, we show a greater coverage than previous approaches, resulting in geomean speedups of 2.5x (Intel) and 3.4x (AMD) over state-of-the-art compilation flows for the C programming language. mlirSynth also enables retargetability to domain-specific accelerators, resulting in a geomean speedup of 21.6x on a TPU.
DOI:10.1109/PACT58117.2023.00012