Buffer Insertion Considering Process Variation

• Published in: Design, Automation and Test in Europe pp. 970 - 975
• Main Authors: Xiong, Jinjun, Tam, Kingho, He, Lei
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 07.03.2005; IEEE
• Series: ACM Conferences
• Subjects: Building integrated photovoltaics; Capacitance; Distributed computing; Hardware > Emerging technologies; Hardware > Hardware validation; Hardware > Very large scale integration design; Integrated circuit interconnections; Law; Legal factors; Mathematics of computing > Discrete mathematics > Graph theory > Graph algorithms; Mathematics of computing > Discrete mathematics > Graph theory > Trees; Mathematics of computing > Probability and statistics > Distribution functions; Mathematics of computing > Probability and statistics > Statistical paradigms; Mathematics of computing > Probability and statistics > Statistical paradigms > Statistical graphics; Probability density function; Routing; Timing; Wire
• ISBN: 9780769522883; 0769522882
• ISSN: 1530-1591
• DOI: 10.1109/DATE.2005.85

A comprehensive probabilistic methodology is proposed to solve the buffer insertion problem with the consideration of process variations. In contrast to a recent work, we point out, for the first time, that the correlation between the required arrival time and the downstream loading capacitance must be considered in order to solve the problem "correctly". We develop an efficient bottom-up recursive algorithm to calculate the joint probability density function that accurately captures the above correlation, and propose effective pruning rules to exclude probabilistically inferior solutions. We verify our buffer insertion using timing analysis with both device andinterconnect variations, and show that compared to the conventional buffer insertion algorithm using nominal device and interconnect parameters, our new buffer insertion methodology can reduce the probability of timing violation by up to 30%.