A QoS-aware memory controller for dynamically balancing GPU and CPU bandwidth use in an MPSoC

• Published in: DAC Design Automation Conference 2012 pp. 850 - 855
• Main Authors: Jeong, Min Kyu, Erez, Mattan, Sudanthi, Chander, Paver, Nigel
• Format: Conference Proceeding
• Language: English
• Published: New York, NY, USA ACM 03.06.2012; IEEE
• Series: ACM Conferences
• Subjects: Bandwidth; Computer systems organization > Architectures > Other architectures > Heterogeneous (hybrid) systems; Computer systems organization > Embedded and cyber-physical systems; Computer systems organization > Real-time systems; Computing methodologies > Computer graphics > Graphics systems and interfaces > Graphics processors; General and reference > Cross-computing tools and techniques > Design; Graphics processing unit; Graphics processor; Memory controller; Quality of service; Random access memory; Real time systems; System on chip; System-on-a-chip; Tiles; memory controller; graphics processor; quality of service; system on chip
• ISBN: 1450311997; 9781450311991
• ISSN: 0738-100X
• DOI: 10.1145/2228360.2228513

Diverse IP cores are integrated on a modern system-on-chip and share resources. Off-chip memory bandwidth is often the scarcest resource and requires careful allocation. Two of the most important cores, the CPU and the GPU, can both simultaneously demand high bandwidth. We demonstrate that conventional quality-of-service allocation techniques can severely constrict GPU performance by allowing the CPU to occasionally monopolize shared bandwidth. We propose to dynamically adapt the priority of CPU and GPU memory requests based on a novel mechanism that tracks progress of GPU workloads. Our evaluation shows that the proposed mechanism significantly improves GPU performance with only minimal impact on the CPU.