(2023, March). Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications. ACM transactions on architecture and code optimization. https://doi.org/10.1145/3575861
Chicago Style (17th ed.) Citation"Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications." ACM Transactions on Architecture and Code Optimization Mar. 2023. https://doi.org/10.1145/3575861.
MLA (9th ed.) Citation"Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications." ACM Transactions on Architecture and Code Optimization, Mar. 2023, https://doi.org/10.1145/3575861.
Warning: These citations may not always be 100% accurate.