IFRA instruction footprint recording and analysis for post-silicon bug localization in processors

• Published in: 2008 45th ACM/IEEE Design Automation Conference pp. 373 - 378
• Main Authors: Park, Sung-Boem, Mitra, Subhasish
• Format: Conference Proceeding
• Language: English
• Published: New York, NY, USA ACM 08.06.2008; IEEE
• Series: ACM Conferences
• Subjects: Analytical models; Bridge circuits; Circuit simulation; Clocks; Computer bugs; Costs; debug; design for debug; Fault detection; Hardware; Hardware > Hardware test; Hardware > Hardware validation; Hardware > Hardware validation > Functional verification; Hardware > Robustness; Information analysis; Reproducibility of results; Validation; verification; design for debug; debug; validation; verification
• ISBN: 1605581151; 9781605581156
• ISSN: 0738-100X
• DOI: 10.1145/1391469.1391569

The objective of IFRA, Instruction Footprint Recording and Analysis, is to overcome the challenges associated with a very expensive step in post-silicon validation of processors -- bug localization in a system setup. IFRA consists of special design and analysis techniques required to bridge a major gap between system-level and circuit-level debug. Special hardware recorders, called Footprint Recording Structures (FRS's), record semantic information about data and control flows of instructions passing through various design blocks of a processor. This information is recorded concurrently during normal operation of a processor in a post-silicon system validation setup. Upon detection of a problem, the recorded information is scanned out and analyzed for bug localization. Special program analysis techniques, together with the binary of the application executed during post-silicon validation, are used for the analysis. IFRA does not require full system-level reproduction of bugs or system-level simulation. Simulation results on a complex super-scalar processor demonstrate that IFRA is effective in accurately localizing bugs with very little impact on overall chip area.