Clock-frequency assignment for multiple clock domain systems-on-a-chip

• Published in: Proceedings of the conference on Design, automation and test in Europe pp. 397 - 402
• Main Authors: Sirowy, Scott, Wu, Yonghui, Lonardi, Stefano, Vahid, Frank
• Format: Conference Proceeding
• Language: English
• Published: San Jose, CA, USA EDA Consortium 16.04.2007
• Series: ACM Conferences
• ISBN: 3981080122; 9783981080124
• DOI: 10.5555/1266366.1266450

Modern systems-on-a-chip platforms support multiple clock domains, in which different sub-circuits are driven by different clock signals. Although the frequency of each domain can be customized, the number of unique clock frequencies on a platform is typically limited. We define the clock-frequency assignment problem to be the assignment of frequencies to processing modules, each with an ideal maximum frequency, such that the sum of module processing times is minimized, subject to a limit on the number of unique frequencies. We develop a novel polynomial-time optimal algorithm to solve the problem, based on dynamic programming. We apply the algorithm to the particular context of post-improvement of accelerator-based hardware/software partitioning, and demonstrate 1.5x-4x additional speedups using just three clock domains.