Characterizing and evaluating voltage noise in multi-core near-threshold processors

Lowering the supply voltage to improve energy efficiency leads to higher load current and elevated supply sensitivity. In this paper, we provide the first quantitative analysis of voltage noise in multi-core near-threshold processors in a future 10nm technology across SPEC CPU2006 benchmarks. Our re...

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Bibliographic Details
Published inProceedings of the 2013 International Symposium on Low Power Electronics and Design pp. 82 - 87
Main Authors Zhang, Xuan, Tong, Tao, Kanev, Svilen, Lee, Sae Kyu, Wei, Gu-Yeon, Brooks, David
Format Conference Proceeding
LanguageEnglish
Published Piscataway, NJ, USA IEEE Press 04.09.2013
SeriesACM Conferences
Subjects
Applied computing > Physical sciences and engineering > Electronics
Computer systems organization > Architectures > Parallel architectures
Hardware > Hardware validation
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ISBN1479912352
9781479912353
DOI10.5555/2648668.2648689

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Summary:Lowering the supply voltage to improve energy efficiency leads to higher load current and elevated supply sensitivity. In this paper, we provide the first quantitative analysis of voltage noise in multi-core near-threshold processors in a future 10nm technology across SPEC CPU2006 benchmarks. Our results reveal larger guardband requirement and significant energy efficiency loss due to power delivery nonidealities at near threshold, and highlight the importance of accurate voltage noise characterization for design exploration of energy-centric computing systems using near-threshold cores.
ISBN:1479912352
9781479912353
DOI:10.5555/2648668.2648689