High-performance, low-power resonant clocking

• Published in: Proceedings of the International Conference on Computer-Aided Design pp. 742 - 745
• Main Authors: Guthaus, Matthew R., Taskin, Baris
• Format: Conference Proceeding
• Language: English; Japanese
• Published: New York, NY, USA ACM 05.11.2012
• Series: ACM Conferences
• Subjects: Applied computing > Arts and humanities > Architecture (buildings) > Computer-aided design; Applied computing > Physical sciences and engineering > Engineering > Computer-aided design; Hardware > Emerging technologies; Hardware > Hardware validation; Hardware > Very large scale integration design
• ISBN: 9781450315739; 1450315739
• DOI: 10.1145/2429384.2429545

Clock distribution networks consume a significant portion of on-chip power. Traditional buffered clock distribution power is limited by frequency, capacitance, and activity rates. Resonant clock distributions can reduce this power by "recycling" energy on-chip and reducing the overall clock power. This tutorial introduces recent techniques for distributed-LC, traveling wave, and standing wave resonant clock distributions. In particular, the tutorial discusses the recent developments and open research problems. The tutorial covers both circuits, computer-aided design algorithms and methodologies for resonant clocking.