A physical alpha-power law MOSFET model

• Published in: Low Power Electronics and Design 1999: Proceedings of the 1999 International Symposium pp. 218 - 222
• Main Authors: Bowman, Keith A., Austin, Blanca L., Eble, John C., Tang, Xinghai, Meindl, James D.
• Format: Conference Proceeding
• Language: English
• Published: New York, NY, USA ACM 17.08.1999; IEEE
• Series: ACM Conferences
• Subjects: Applied computing > Physical sciences and engineering > Electronics; Circuit optimization; Circuit simulation; Current measurement; Hardware > Electronic design automation > Physical design (EDA); Hardware > Very large scale integration design; Joining processes; Mathematical model; MOSFET circuits; Power generation; Power measurement; Power MOSFET; Velocity measurement
• ISBN: 158113133X; 9781581131338
• DOI: 10.1145/313817.313930

A new compact physics-based alpha-power law MOSFET model is introduced to enable projections of low power circuit performance for future generations of technology by linking the simple mathematical expressions of the original Alpha-Power Law Model with their physical origins. The new model, verified by HSPICE simulations and measured data, includes: (1) a subthreshold region of operation for evaluating the on/off current trade-off that becomes a dominant low power design issue as technology scales, (2) the effects of vertical and lateral high field mobility degradation and velocity saturation, and (3) threshold voltage roll-off. Model projections for MOSFET CV/I indicate a 2X-performance opportunity compared to NTRS extrapolations for the 250, 180, and 150 nm generations subject to maximum leakage current estimates of the roadmap. NTRS and model calculations converge at the 70 nm technology generation, which exhibits pronounced on/off current interdependence for low power gigascale integration (GSI).