Computer architecture : a quantitative approach

The era of seemingly unlimited growth in processor performance is over: single chip architectures can no longer overcome the performance limitations imposed by the power they consume and the heat they generate. Today, Intel and other semiconductor firms are abandoning the single fast processor model...

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Bibliographic Details
Main Author: Hennessy, John L.
Other Authors: Patterson, David A., Arpaci-Dusseau, Andrea C.
Format: eBook
Language: English
Published: Amsterdam ; Boston : Elsevier/Morgan Kaufmann Publishers, 2007.
Edition: 4th ed.
Series: Morgan Kaufmann Series in Computer Architecture and Design.
Subjects:
Computer architecture.
Computer storage devices.
Parallel processing (Electronic computers)
Embedded computer systems > Design and construction.
Computer networks.
Memory hierarchy (Computer science)
Multiprocessors.
Computer arithmetic.
elektronické knihy
electronic books
ISBN: 9780080475028
0080475027
1282330020
9781282330023
9786612330025
6612330023
9780123704900
0123704901
Physical Description: 1 online resource (various pagings) : illustrations

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Table of contents

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100 1 |a Hennessy, John L. 
245 1 0 |a Computer architecture :  |b a quantitative approach /  |c John L. Hennessy, David A. Patterson ; with contributions by Andrea C. Arpaci-Dusseau [and others]. 
250 |a 4th ed. 
260 |a Amsterdam ;  |a Boston :  |b Elsevier/Morgan Kaufmann Publishers,  |c 2007. 
300 |a 1 online resource (various pagings) :  |b illustrations 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a The Morgan Kaufmann Series in Computer Architecture and Design 
504 |a Includes bibliographical references and index. 
505 0 |a Fundamentals of computer design -- Instruction-level parallelism and its exploitation -- Limits on instruction-level parallelism -- Multiprocessors and thread-level parallelism -- Memory hierarchy design -- Storage systems -- Pipelining: basic and intermediate concepts -- Instruction set principles and examples -- Review of memory hierarchy. 
506 |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty 
520 |a The era of seemingly unlimited growth in processor performance is over: single chip architectures can no longer overcome the performance limitations imposed by the power they consume and the heat they generate. Today, Intel and other semiconductor firms are abandoning the single fast processor model in favor of multi-core microprocessors--chips that combine two or more processors in a single package. In the fourth edition of Computer Architecture, the authors focus on this historic shift, increasing their coverage of multiprocessors and exploring the most effective ways of achieving parallelism as the key to unlocking the power of multiple processor architectures. Additionally, the new edition has expanded and updated coverage of design topics beyond processor performance, including power, reliability, availability, and dependability. 
590 |a Knovel  |b Knovel (All titles) 
650 0 |a Computer architecture. 
650 0 |a Computer storage devices. 
650 0 |a Parallel processing (Electronic computers) 
650 0 |a Embedded computer systems  |x Design and construction. 
650 0 |a Computer networks. 
650 0 |a Memory hierarchy (Computer science) 
650 0 |a Multiprocessors. 
650 0 |a Computer arithmetic. 
655 7 |a elektronické knihy  |7 fd186907  |2 czenas 
655 9 |a electronic books  |2 eczenas 
700 1 |a Patterson, David A. 
700 1 |a Arpaci-Dusseau, Andrea C. 
776 0 8 |i Print version:  |a Hennessy, John L.  |t Computer architecture.  |b 4th ed.  |d Amsterdam ; Boston : Morgan Kaufmann, 2007  |z 0123704901  |w (DLC) 2006024358  |w (OCoLC)70830951 
830 0 |a Morgan Kaufmann Series in Computer Architecture and Design. 
856 4 0 |u https://proxy.k.utb.cz/login?url=https://app.knovel.com/hotlink/toc/id:kpCAAQAE02/computer-architecture-a?kpromoter=marc  |y Full text 

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