More-than-Moore 2.5D and 3D SiP integration
This book presents a realistic and a holistic review of the microelectronic and semiconductor technology options in the post Moore?s Law regime. Technical tradeoffs, from architecture down to manufacturing processes, associated with the 2.5D and 3D integration technologies, as well as the business a...
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| Main Author | |
|---|---|
| Format | Electronic eBook |
| Language | English |
| Published |
Cham :
Springer,
2017.
|
| Subjects | |
| Online Access | Full text |
| ISBN | 9783319525488 9783319525471 |
| Physical Description | 1 online resource (192 pages) |
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| 100 | 1 | |a Radojcic, Riko. | |
| 245 | 1 | 0 | |a More-than-Moore 2.5D and 3D SiP integration / |c Riko Radojcic. |
| 260 | |a Cham : |b Springer, |c 2017. | ||
| 300 | |a 1 online resource (192 pages) | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a počítač |b c |2 rdamedia | ||
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| 505 | 0 | |a Preface; Acknowledgements; Contents; Definition of Acronyms; Definition of Terms; 1 Introduction; References; 2 More-than-Moore Technology Opportunities: 2.5D SiP; 2.1 Overview; 2.2 2.5D SiP Technology Candidates; 2.2.1 Through-Si Interposer (TSI); 2.2.2 Low-Cost Si Interposer (LCIs); 2.2.3 Photo-Defined Organic Interposer (POI); 2.2.4 Low-Cost Glass Interposer (LCIg); 2.2.5 Fan Out WLP; 2.2.6 Hybrid Technologies (SLIT, SLIM); 2.3 2.5D SiP Technology Value Propositions; 2.3.1 System Integration Value Proposition; 2.3.2 Split Die SiP Value Proposition; 2.3.3 Small Die SiP Value Propositions. | |
| 505 | 8 | |a 2.4 2.5D SiP Technology Tradeoffs2.4.1 Architecture Knobs; 2.4.2 Physical Design Knobs; 2.4.3 Si Technology Knobs; 2.4.4 Packaging Technology Knobs; 2.4.5 Test Knobs; 2.5 2.5D SiP Technology Solutions; 2.5.1 2.5D Technology Solutions for Integrated SiP; 2.5.2 2.5D Technology Solutions for Area-Based Split Die SiP; 2.5.3 2.5D Technology Solutions for Small Die SiP; References; 3 More-than-Moore Technology Opportunities: 3D SiP; 3.1 Overview; 3.2 3D SiP Technology Options; 3.2.1 Requirements; 3.2.2 TSV Formation; 3.2.3 TSV Integration with CMOS Flow; 3.2.4 TSV Integration with Assembly Flow. | |
| 505 | 8 | |a 3.3 3D SiP Technology Value Propositions3.3.1 Homogenous 3D SiP Integration Value Proposition; 3.3.2 Heterogeneous 3D SiP Integration Value; 3.3.3 WideIO Memory Value Proposition; 3.4 3D SiP Technology Tradeoffs; 3.4.1 Architecture Knobs; 3.4.2 Application Knobs; 3.4.3 Physical Design Knobs; 3.4.4 TSV Technology Knobs; 3.5 3D SiP Technology Solutions; 3.5.1 3D Technology Solutions for Heterogeneous M-o-L Integration; 3.5.2 3D Technology Solutions for Homogeneous and/or Heterogenous L-o-L Integration; References; 4 More-than-Moore Design Eco-System; 4.1 Overview. | |
| 505 | 8 | |a 4.2 More-than-Moore Architectural Opportunities4.2.1 Architecture Concepts; 4.2.2 Physical Partitioning Concepts; 4.3 More-than-Moore Design for Multi-Physics Opportunities; 4.3.1 Challenges; 4.3.2 Infrastructure Requirements; 4.3.3 Thermal Management; 4.3.4 Mechanical Stress Management; 4.3.5 Electrical Interaction Management; 4.4 More-than-Moore Design Methodology Opportunities; 4.4.1 Design Methodology Requirements-Ideal; 4.4.2 Design Methodology Requirements-Practical; 4.4.3 Design Methodology-Current Status; 4.5 More-than-Moore Modeling and Characterization Opportunities. | |
| 505 | 8 | |a 4.5.1 Test Chip Strategy4.5.2 Test Chip Content; 4.5.3 Characterization and Models; References; 5 More-than-Moore Adoption Landscape; 5.1 Business Development Landscape; 5.1.1 "The Cast"; 5.1.2 "The Plot"; 5.2 Technology Development Landscape; 5.2.1 Landscape for "More-Moore" Scaling; 5.2.2 Landscape for "More-than-Moore" Scaling; 5.3 Product Development Landscape; 5.3.1 Technology Intersect; 5.3.2 Schedule Conundrum; 5.3.3 Cost Projection Conundrum; 5.3.4 Risk Conundrum; 5.3.5 Benefit Conundrum; 5.4 Observations and Opinions; 5.4.1 Product Sector Drivers; 5.4.2 Mobile Sector Drivers. | |
| 500 | |a 5.4.3 Concluding Remarks. | ||
| 504 | |a Includes bibliographical references and index. | ||
| 506 | |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty | ||
| 520 | |a This book presents a realistic and a holistic review of the microelectronic and semiconductor technology options in the post Moore?s Law regime. Technical tradeoffs, from architecture down to manufacturing processes, associated with the 2.5D and 3D integration technologies, as well as the business and product management considerations encountered when faced by disruptive technology options, are presented. Coverage includes a discussion of Integrated Device Manufacturer (IDM) vs Fabless, vs Foundry, and Outsourced Assembly and Test (OSAT) barriers to implementation of disruptive technology options. This book is a must-read for any IC product team that is considering getting off the Moore?s Law track, and leveraging some of the More-than-Moore technology options for their next microelectronic product. | ||
| 590 | |a SpringerLink |b Springer Complete eBooks | ||
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