Fundamentals of IP and SoC security : design, verification, and debug
This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate...
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| Other Authors: | , , |
|---|---|
| Format: | eBook |
| Language: | English |
| Published: |
Cham, Switzerland :
Springer,
[2017]
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| Subjects: | |
| ISBN: | 9783319500577 9783319500553 |
| Physical Description: | 1 online resource |
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Table of contents
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| 020 | |a 9783319500577 |q (electronic bk.) | ||
| 020 | |z 9783319500553 |q (print) | ||
| 024 | 7 | |a 10.1007/978-3-319-50057-7 |2 doi | |
| 035 | |a (OCoLC)970041832 |z (OCoLC)970610481 |z (OCoLC)970798266 |z (OCoLC)974650238 |z (OCoLC)981113608 |z (OCoLC)981774496 |z (OCoLC)1005807237 |z (OCoLC)1011794916 |z (OCoLC)1048129735 |z (OCoLC)1058335311 |z (OCoLC)1066476365 |z (OCoLC)1066616775 |z (OCoLC)1086492183 |z (OCoLC)1112578255 |z (OCoLC)1113347548 |z (OCoLC)1113390085 |z (OCoLC)1116146681 |z (OCoLC)1122814847 |z (OCoLC)1127157870 | ||
| 245 | 0 | 0 | |a Fundamentals of IP and SoC security : |b design, verification, and debug / |c Swarup Bhunia, Sandip Ray, Susmita Sur-Kolay, editors. |
| 264 | 1 | |a Cham, Switzerland : |b Springer, |c [2017] | |
| 300 | |a 1 online resource | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a počítač |b c |2 rdamedia | ||
| 338 | |a online zdroj |b cr |2 rdacarrier | ||
| 505 | 0 | |a 1 The Landscape of SoC and IP Security; 1.1 Introduction; 1.2 SoC Design Supply Chain and Security Assets; 1.3 The Challenge of Design Complexity; 1.4 State of Security Design and Validation: Research and Practice; 1.5 The Book; References; 2 Security Validation in Modern SoC Designs; 2.1 Security Needs in Modern SoC Designs; 2.2 Supply Chain Security Threats; 2.3 Security Policies: Requirements from Design; 2.4 Adversaries in SoC Security; 2.5 IP-Level Trust Validation; 2.6 Security Along SoC Design Life Cycle; 2.7 Security Validation Activities; 2.8 Validation Technologies. | |
| 505 | 8 | |a 2.9 SummaryReferences; 3 SoC Security and Debug; 3.1 Introduction; 3.2 SoC Debug Architecture; 3.2.1 Debug Interface; 3.2.2 On-Chip DfD Instrumentation; 3.3 Security Concerns and Hazards; 3.3.1 SoC Security Requirements; 3.3.2 DfD Induced Security Hazards; 3.4 Protection Against Hazards Induced by Debugging; 3.4.1 Trade-Off Between Security and Debug; 3.4.2 Authentication-Based Debug Access Control; 3.4.3 Limitations and Challenges; 3.5 Summary; References; 4 IP Trust: The Problem and Design/Validation-Based Solution; 4.1 Introduction; 4.2 Design for IP Protection; 4.2.1 Threat Model. | |
| 505 | 8 | |a 4.2.2 Combinational Logic Locking/Encryption4.2.3 Finite State Machine Locking/Encryption; 4.2.4 Protection Methods for FPGA IP; 4.3 IP Certification; 4.4 Conclusion; References; 5 Security of Crypto IP Core: Issues and Countermeasures; 5.1 Introduction; 5.1.1 Implementation: An Issue for Security; 5.1.2 Side Channels; 5.2 Power Analysis of Cryptographic Cores; 5.2.1 Simple Power Attack (SPA); 5.2.2 Differential Power Attacks; 5.2.3 Template Attack; 5.3 Countermeasures Against Power Analysis; 5.3.1 t-Private Circuit; 5.3.2 Masking; 5.3.3 DRECON: DPA Resistant Encryption by Construction. | |
| 505 | 8 | |a 5.3.4 Evaluation of Side Channel Leakage for a Crypto Core5.4 Fault Attack Resistant Crypto Cores; 5.4.1 General Principle of DFA of Block Ciphers; 5.4.2 Fault Analysis of AES; 5.4.3 Experimental Results on Fault Models; 5.4.4 Proposed DFA on AES-192 Key Schedule ; 5.4.5 Countermeasures Against DFA; 5.5 Testing and Validation of Crypto Cores; 5.5.1 Working Principle of Scan-Chain-Attacks on Block Ciphers; 5.6 Conclusions; References; 6 PUF-Based Authentication; 6.1 Introduction; 6.2 Information Security and Cryptography; 6.3 Cryptographic Primitives for Authentication Protocols. | |
| 505 | 8 | |a 6.3.1 Random Number Generation6.3.2 Cryptographic Hash Functions; 6.3.3 Secure Sketches and Fuzzy Extractors; 6.3.4 Statistical Metrics; 6.4 Traditional, Software-Oriented Authentication; 6.4.1 Entity Authentication; 6.5 Physical Unclonable Functions (PUFs); 6.5.1 PUF-Based Authentication; 6.5.2 Strong Versus Weak PUFs; 6.5.3 The Arbiter PUF; 6.5.4 Hardware-Embedded Delay PUF (HELP); Clock Strobing; PN Processing; Temperature-Voltage (TV) Compensation; Bit Generation Algorithm; Entropy Analysis; Statistical Analysis of the Bitstrings; Security Property Analysis. | |
| 506 | |a Plný text je dostupný pouze z IP adres počítačů Univerzity Tomáše Bati ve Zlíně nebo vzdáleným přístupem pro zaměstnance a studenty | ||
| 520 | |a This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the "trenches" of current industrial practice in design, implementation, and validation of security-critical embedded systems. Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs; Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs; Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security. | ||
| 504 | |a Includes bibliographical references. | ||
| 590 | |a SpringerLink |b Springer Complete eBooks | ||
| 650 | 0 | |a Computer security. | |
| 650 | 0 | |a Data encryption (Computer science) | |
| 650 | 0 | |a Internet |x Security measures. | |
| 655 | 7 | |a elektronické knihy |7 fd186907 |2 czenas | |
| 655 | 9 | |a electronic books |2 eczenas | |
| 700 | 1 | |a Bhunia, Swarup, |e editor. | |
| 700 | 1 | |a Ray, Sandip, |e editor. | |
| 700 | 1 | |a Sur-Kolay, Susmita, |e editor. | |
| 776 | 0 | 8 | |i Print version: |t Fundamentals of Ip and Soc Security. |d Springer Verlag 2017 |z 9783319500553 |w (OCoLC)962231136 |
| 856 | 4 | 0 | |u https://proxy.k.utb.cz/login?url=https://link.springer.com/10.1007/978-3-319-50057-7 |y Plný text |
| 992 | |c NTK-SpringerENG | ||
| 999 | |c 99747 |d 99747 | ||
| 993 | |x NEPOSILAT |y EIZ | ||
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