Clock-frequency assignment for multiple clock domain systems-on-a-chip
Modern systems-on-a-chip platforms support multiple clock domains, in which different sub-circuits are driven by different clock signals. Although the frequency of each domain can be customized, the number of unique clock frequencies on a platform is typically limited. We define the clock-frequency...
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| Published in | 2007 Design, Automation & Test in Europe Conference & Exhibition : Nice, France, 16-20 April 2007 pp. 397 - 402 |
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| Main Authors | , , , |
| Format | Conference Proceeding |
| Language | English |
| Published |
01.04.2007
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| Online Access | Get full text |
| ISBN | 9783981080124 3981080122 |
| DOI | 10.1145/1016720.1016752 |
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| Summary: | Modern systems-on-a-chip platforms support multiple clock domains, in which different sub-circuits are driven by different clock signals. Although the frequency of each domain can be customized, the number of unique clock frequencies on a platform is typically limited. We define the clock-frequency assignment problem to be the assignment of frequencies to processing modules, each with an ideal maximum frequency, such that the sum of module processing times is minimized, subject to a limit on the number of unique frequencies. We develop a novel polynomial-time optimal algorithm to solve the problem, based on dynamic programming. We apply the algorithm to the particular context of post-improvement of accelerator-based hardware/software partitioning, and demonstrate 1.5x-4x additional speedups using just three clock domains. |
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| Bibliography: | ObjectType-Conference Paper-1 SourceType-Conference Papers & Proceedings-1 content type line 25 |
| ISBN: | 9783981080124 3981080122 |
| DOI: | 10.1145/1016720.1016752 |