Multilevel logic synthesis using algorithms based on natural processes

In this paper we address the optimization problem of multilevel logical functions using algorithms based on natural process. We show the results found by applying the simulated annealing algorithm and a genetic algorithm to area optimization of multilevel logical networks using the IWLS'93 benc...

Full description

Saved in:
Bibliographic Details
Published in1995 20th International Conference on Microelectronics Proceedings Vol. 2; pp. 823 - 828 vol.2
Main Authors Sanchez, J.M., Lanchares, J.
Format Conference Proceeding
LanguageEnglish
Published IEEE Electron Devices Society 1995
Subjects
Cost function
Design optimization
Genetic algorithms
Genetic mutations
Heuristic algorithms
Logic functions
Organisms
Silicon
Simulated annealing
Thermodynamics
Online AccessGet full text
ISBN9780780327863
0780327861
DOI10.1109/ICMEL.1995.500975

Cover

More Information
Summary:In this paper we address the optimization problem of multilevel logical functions using algorithms based on natural process. We show the results found by applying the simulated annealing algorithm and a genetic algorithm to area optimization of multilevel logical networks using the IWLS'93 benchmarks.
ISBN:9780780327863
0780327861
DOI:10.1109/ICMEL.1995.500975