O, S. R., & SM, S. (2023). Fault Tolerant FPGA Implementation on Redundancy Techniques and ECG Denoising. https://doi.org/10.48550/arxiv.2304.08165
Chicago Style (17th ed.) CitationO, Sathvik Reddy, and Sakthivel SM. Fault Tolerant FPGA Implementation on Redundancy Techniques and ECG Denoising. 2023. https://doi.org/10.48550/arxiv.2304.08165.
MLA (9th ed.) CitationO, Sathvik Reddy, and Sakthivel SM. Fault Tolerant FPGA Implementation on Redundancy Techniques and ECG Denoising. 2023. https://doi.org/10.48550/arxiv.2304.08165.
Warning: These citations may not always be 100% accurate.