HALOTIS high accuracy LOgic TIming simulator with inertial and degradation delay model

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Bibliographic Details
Published inProceedings of the conference on Design, automation and test in Europe pp. 467 - 471
Main Authors Vazquez, P., Juan-Chico, J., Bellido, M., Acosta, A., Valencia, M.
Format Conference Proceeding
LanguageEnglish
Published Piscataway, NJ, USA IEEE Press 13.03.2001
SeriesACM Conferences
Subjects
Computing methodologies > Artificial intelligence > Knowledge representation and reasoning > Temporal reasoning
Hardware > Communication hardware, interfaces and storage > Buses and high-speed links
Hardware > Hardware validation > Functional verification > Simulation and emulation
Theory of computation > Logic > Modal and temporal logics
Online AccessGet full text
ISBN9780769509938
0769509932
DOI10.5555/367072.367328

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Author Valencia, M.
Bellido, M.
Vazquez, P.
Acosta, A.
Juan-Chico, J.
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Editor Jerraya, Ahmed
Nebel, Wolfgang
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  organization: TIMA, Grenoble, France
EndPage 471
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StartPage 467
SubjectTerms Computing methodologies -- Artificial intelligence -- Knowledge representation and reasoning -- Temporal reasoning
Hardware -- Communication hardware, interfaces and storage -- Buses and high-speed links
Hardware -- Hardware validation -- Functional verification -- Simulation and emulation
Theory of computation -- Logic -- Modal and temporal logics
Subtitle high accuracy LOgic TIming simulator with inertial and degradation delay model
Title HALOTIS
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