Low hardware complexity encryption algorithm using order 1-D programmable linear cellular automata

• Published in: 2017 4th International Conference on Signal Processing and Integrated Networks (SPIN) pp. 385 - 389
• Main Authors: Gangadari, Bhoopal Rao, Ahamed, Shaik Rafi
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2017
• Subjects: 1 st order one dimensional programmable linear cellular automata (1 st LCA); Advanced Encryption Standard (AES); Algorithm design and analysis; Automata; cellular automata (CA); Ciphers; Encryption; Field Programmable Gate Array (FPGA); Signal processing algorithms
• DOI: 10.1109/SPIN.2017.8049979

Cryptography play an most essential role in the field of data security. This paper, we proposed cryptographically secure encryption algorithm architecture using order one dimensional programmable linear cellular automata (1 st LCA). This paper also emphasizes on the comparative analysis of hardware utilization for conventional AES algorithm and encryption algorithm using 1 st LCA in terms of power, area and throughput. Moreover, the cryptographic properties like correlation immunity bias, strict avalanche criteria, non linearity and entropy are used to evaluate the level of security provided by AES algorithm and encryption algorithm architecture using LCA. The synthesis results of FPGA shows that the encryption algorithm architecture using 1 st order one dimensional programmable linear cellular automata (1 st LCA) gives better level of security, low power consumption, high efficiency compared to that of standard AES algorithm. The proposed encryption algorithm attained a throughput of 1.33 Gbps and high operating frequency of 534 MHz compared with existing designs.