Area-Efficient FPGA Implementations of the SHA-3 Finalists - Jungk, B.; Apfelbeck, J. (2011 International Conference on Reconfigurable Computing and FPGAs, 2011)
Keywords: Adders; Clocks; Compact Implementation; Computer architecture; Cryptography; Field programmable gate arrays; FPGA; Hash Functions; Pipeline processing; Random access memory; SHA-3; Throughput