Register pressure aware scheduling for high level synthesis

• Published in: 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011) pp. 461 - 466
• Main Authors: Beidas, R, Wai Sum Mong, Jianwen Zhu
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.01.2011
• Subjects: Communities; Couplings; Optimization; Registers; Resource management; Schedules; Scheduling
• ISBN: 9781424475155; 1424475155
• ISSN: 2153-6961
• DOI: 10.1109/ASPDAC.2011.5722234

Variations of list scheduling became the de-facto standard of scheduling straight line code in software compilers, a trend faithfully inherited by high-level synthesis solutions. Due to its nature, list scheduling is oblivious of the tightly coupled register pressure; a dangling fundamental problem that has been attacked by the compiler community for decades, and which results, in case of highlevel synthesis, in excessive instantiations of registers and accompanying steering logic. To alleviate this problem, we propose a synthesis framework called soft scheduling, which acts as a resource unconstrained pre-scheduling stage that restricts subsequent scheduling to minimize register pressure. This optimization objective is formulated as a live range minimization problem, a measure shown to be proportional to register pressure, and optimally solved in polynomial time using minimum cost network flow formulation. Unlike past solutions in the compiler community, which try to reduce register pressure by local serialization of subject instructions, the proposed solution operates on the entire basic block or hyperblock and systematically handles instruction chaining subject to the same objective. The application of the proposed solution to a set of real-life benchmarks results in a register pressure reduction ranging, on average, between 11% and 41% depending on the compilation and synthesis configurations with minor 2% to 4% increase in schedule latency.