VB-DVFS: A new algorithm for power efficiency of CMP with GALS

• Published in: 2010 17th IEEE International Conference on Electronics, Circuits and Systems pp. 297 - 300
• Main Authors: Duan Wei, Fan Qi Fei, Huang Kun, Zhang Ge
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.12.2010
• Subjects: Algorithm design and analysis; Clocks; Dynamic Voltage Frequency Scaling; Globally Asynchronous Locally Synchronous; Power Efficiency; Single-Chip Multiprocessor
• ISBN: 1424481554; 9781424481552
• DOI: 10.1109/ICECS.2010.5724512

The advent of era of multi-core makes power consumption being the prime constraint of microprocessor design. The globally asynchronous locally synchronous (GALS) design of distributed clock network can excellently improve the power efficiency of single-chip multiprocessor (CMP) using dynamic voltage and frequency scaling (DVFS) policy. This paper proposes a new DVFS algorithm, which is used on CMP with GALS technology. The new algorithm, named Voting Based DVFS (VB-DVFS), dynamically adjusts voltage and frequency of processors in CMP according to the information of architecture and program behaviors. According to the experimental results, our algorithm reduces 24.8% power consumption, while just causing 9.9% performance loss.