3D Stacking of SiC Integrated Circuit Chips with Gold Wire Bonded Interconnects for Long-Duration High-Temperature Applications. https://doi.org/10.36227/techrxiv.20224548.v1
Chicago Style (17th ed.) Citation3D Stacking of SiC Integrated Circuit Chips with Gold Wire Bonded Interconnects for Long-Duration High-Temperature Applications. https://doi.org/10.36227/techrxiv.20224548.v1.
MLA (9th ed.) Citation3D Stacking of SiC Integrated Circuit Chips with Gold Wire Bonded Interconnects for Long-Duration High-Temperature Applications. https://doi.org/10.36227/techrxiv.20224548.v1.
Warning: These citations may not always be 100% accurate.