A Real Time FPGA Implementation and Analysis of a Novel Chaotic System - Yadav, Bhola; Garg, Ayush; Sahu, Kaustuv; Suneja, Kriti (2022 International Conference for Advancement in Technology (ICONAT), 2022)
In this paper, we have designed and implemented a Novel chaos generator having cubic non-linearities for supporting higher levels of encryption. We have modelled our generator using Verilog Hardware Description Language on Xilinx Kintex 7 FPGA development environment by utilizing Runge Kutta's 4th order-based algorithms for mathematical analysis. The mathematical analysis of the proposed novel chaos generator has been carried out using python. The proposed system is implemented on the FPGA and is verified using bifurcation diagram and Lyapunov's exponent. Several aspects such as Slice LUTs used, delay, DSPs, etc. have been calculated to analyse the performance of the proposed system.