APA (7th ed.) Citation

Yu, T., Tan, S. X., Cai, Y., & Tang, P. (2014, January). Time-domain performance bound analysis for analog and interconnect circuits considering process variations. Proceedings of the ASP-DAC ... Asia and South Pacific Design Automation Conference, 455-460. https://doi.org/10.1109/ASPDAC.2014.6742933

Chicago Style (17th ed.) Citation

Yu, Tan, Sheldon X.-D Tan, Yici Cai, and Puying Tang. "Time-domain Performance Bound Analysis for Analog and Interconnect Circuits Considering Process Variations." Proceedings of the ASP-DAC ... Asia and South Pacific Design Automation Conference Jan. 2014: 455-460. https://doi.org/10.1109/ASPDAC.2014.6742933.

MLA (9th ed.) Citation

Yu, Tan, et al. "Time-domain Performance Bound Analysis for Analog and Interconnect Circuits Considering Process Variations." Proceedings of the ASP-DAC ... Asia and South Pacific Design Automation Conference, Jan. 2014, pp. 455-460, https://doi.org/10.1109/ASPDAC.2014.6742933.