A Wide Temperature Range Bandgap Reference Circuit with MOS Transistor Curvature Compensation

In this paper, an improved self-biased all-MOS current-mode bandgap reference (BGR) with a segmented curvature corrected compensation circuitry is designed to widen the temperature range. The compensation circuit utilized the piecewise curvature compensation technique and additional circuit of curre...

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Published in2021 IEEE International Conference on Sensors and Nanotechnology (SENNANO) pp. 130 - 133
Main Authors Abd Rashid, Anith Nuraini, Sal Hamid, Sofiyah, Rhaffor, Nuha A., Abd Manaf, Asrulnizam
Format Conference Proceeding
LanguageEnglish
Published IEEE 22.09.2021
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DOI10.1109/SENNANO51750.2021.9642532

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Abstract In this paper, an improved self-biased all-MOS current-mode bandgap reference (BGR) with a segmented curvature corrected compensation circuitry is designed to widen the temperature range. The compensation circuit utilized the piecewise curvature compensation technique and additional circuit of current sinking and current mirror sourcing method for a non-linear current subtraction and current generator. The proposed BGR is implemented in 180nm CMOS technology generated voltage reference of 552mV with an applied voltage of 1.8V. The simulation resulted in a low TC of 6.85ppm/°C at a temperature range of -40°C to 145°C and power consumption of 72.91pW. The power supply rejection ratio (PSRR) simulated results in relatively high performance of a -78.25dB at 100Hz and the line sensitivity of 0.04%/V for a voltage range between 1.26V to 3V. The BGR chip layout area designed is 0.0289mm2.
AbstractList In this paper, an improved self-biased all-MOS current-mode bandgap reference (BGR) with a segmented curvature corrected compensation circuitry is designed to widen the temperature range. The compensation circuit utilized the piecewise curvature compensation technique and additional circuit of current sinking and current mirror sourcing method for a non-linear current subtraction and current generator. The proposed BGR is implemented in 180nm CMOS technology generated voltage reference of 552mV with an applied voltage of 1.8V. The simulation resulted in a low TC of 6.85ppm/°C at a temperature range of -40°C to 145°C and power consumption of 72.91pW. The power supply rejection ratio (PSRR) simulated results in relatively high performance of a -78.25dB at 100Hz and the line sensitivity of 0.04%/V for a voltage range between 1.26V to 3V. The BGR chip layout area designed is 0.0289mm2.
Author Rhaffor, Nuha A.
Abd Manaf, Asrulnizam
Abd Rashid, Anith Nuraini
Sal Hamid, Sofiyah
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  organization: Universiti Sains Malaysia,Collaborative Microelectronic Design Excellence Center,Pulau Pinang,Malaysia
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Snippet In this paper, an improved self-biased all-MOS current-mode bandgap reference (BGR) with a segmented curvature corrected compensation circuitry is designed to...
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StartPage 130
SubjectTerms bandgap reference
Current mirrors
curvature compensation
low power
Photonic band gap
piecewise
Power demand
PSRR
Sensitivity
Simulation
Temperature distribution
Temperature sensors
voltage reference
Title A Wide Temperature Range Bandgap Reference Circuit with MOS Transistor Curvature Compensation
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